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Home > TERATEC FORUM > Workshops > Workshop 6
Components and increasing performances of HPC systems: effervescence, divergence, convergence
Traditional monolithic silicon design and manufacturing faces various challenges that include increasing cost and complexity. One solution consists in breaking up the monolithic silicon into smaller and specialized functions called chiplets, which are then co-packaged to create larger, more complex semiconductor devices. These small and modular integrated circuits consist of a highly tuned and complex building block or a discrete group of functions that allow for SoC differentiation. Via co-packaging, chiplets provide designers and manufacturers with flexible and scalable design capabilities to meet the design requirements of modern SoCs. At AMD, challenges and limitations of traditional monolithic design have been addressed by designing and manufacturing chiplet-based System on Chip (SoC) solutions leading to exascale class accelerated supercomputers for both HPC and AI. In this presentation, we will talk about AMD multi-die architecture and the benefits of adopting such a design approach. Furthermore, we will discuss the future of high computing systems since nowadays, HPC is increasingly influenced by AI.
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