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Home > TERATEC FORUM > Workshops > Workshop 8
Workshop 08 - 09:00 am to 12:30 am
Technologies and uses of the future
Chaired by Frédéric Pariente, Solutions Architect Manager, Nvidia, Christian Saguez, Co-fondateur et Président d’honneur, Teratec, and Thierry Collette, Director, Information Sciences and Techniques Research Group, Thales Research & Technology France
Accelerators and methods for bringing Artificial Intelligence closer to the user - Edge AI -
By Marc Duranton, PhD, Senior Fellow, Digital Systems and Integrated Circuits Division, CEA list
Artificial Intelligence (AI) has emerged as a transformative force across various sectors, from healthcare to transportation. While traditional deployment of AI models has predominantly been on cloud servers, there's an increasing trend towards implementing AI at the edge, known as Edge AI. This paradigm shift brings manifold benefits, including enhanced efficiency, reduced costs, and quicker response times. It bolsters privacy and security by processing data locally, diminishes bandwidth requirements, increases system reliability — allowing operations even in the absence of network connectivity — facilitates more efficient scaling, and significantly improves user experiences.
This presentation will delve into the following key areas:
- The methodologies and tools required for transitioning AI to the edge, along with their specific requirements.
- High-efficiency accelerators for processing sound, images, video, and signals at the edge.
- The advent of Generative AI at the edge and its current applications.
We will conclude by exploring potential future directions in Edge AI, setting the stage for further innovations and advancements in this field.
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Biography: Dr. Marc Duranton is a Senior Fellow of CEA and member of the Digital Systems and Integrated Circuits Division of CEA, where he is involved in realizations (hardware accelerators and software tools) for Artificial Intelligence, for Cyber Physical Systems and for distributed systems from IoT to Cloud. He previously spent more than 23 years in Philips where he led the development of the family of L-Neuro chips, digital processors using artificial neural networks. He also worked on several video coprocessors for the VLIW processor TriMedia and for various Nexperia platforms. He is in charge of the roadmap activities of the HiPEAC community, freely available at https://www.hipeac.net/vision/ and is also involved in the Strategic Research and Innovation Agenda of the Electronics Components and Systems (ECS SRIA) and especially on the chapter on Edge computing and embedded Artificial Intelligence (available at https://ecssria.eu/2024_2.1 ). |
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