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TERATEC 2017 Forum
Workshop 7 - Wednesday, June 28 from 14:00 to 17:30
Interconnect

Maximising heterogeneous system performance with ARM Interconnect and CCIX technologies
Neil PARRIS, Directeur Marketing Interconnect, ARM

Abstract :  As high performance computing platforms move toward Exascale, system efficiency is becoming more and more critical as demonstrated by the increasing number of heterogeneous compute deployments for machine learning, analytics and network acceleration use cases. This talk will illustrate how ARM on-chip interconnect technologies can be combined with multichip CCIX (Cache Coherent Interconnect for Accelerators) to create highly scalable coherent platforms. Together the technologies allow SoC and system architects to blend the right amount of compute and acceleration to address the efficiency demands for Exascale and beyond.

Bio : Neil Parris is the Director of Product Marketing for ARM CoreLink interconnect products which cover a wide range of markets from microcontrollers to HPC. Neil joined ARM in 2000 as a design engineer developing interconnect IP and test silicon. Neil supported some of ARM’s largest partners as field applications engineer in Silicon Valley and most recently moved to product marketing roles at the ARM HQ in Cambridge. Neil has a long held interest in heterogeneous compute and cache coherent interconnects and is excited to see ARM technology used in new applications from sensors to servers and from the edge to the cloud.

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For any other information regarding the workshops, please contact :

Jean-Pascal JEGU
Tel : +33 (0)9 70 65 02 10
jean-pascal.jegu@teratec.fr
Campus TERATEC
2, rue de la Piquetterie
91680 BRUYERES-LE-CHATEL
France


 

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