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TERATEC Forum 2011
Workshop 1
Architecture and storage for future systems

This workshop will cover some of the opportunities to design HPC system aiming to deliver in a near future an hundred petaflops and on a longer term exaflops. On system architecture, the topics will include Many-Core architecture, interconnect network design and the challenges to optimize power efficiency of large supercomputer. On the storage side, the subjects covered will be disk systems, file systems and their connection to hierarchical storage system. The presnetators will come from the following organization : Intel, Heidelberg University, Bull, DataDirect Network, SGI and Xyratex.

 

Chairman : Jean-François LAVIGNON, BULL
08h30 Registration - Exhibition - Networking - Grand Hall
09h00

MIC: rearchitecting Intel for exascale
John HENGEWELD, INTEL

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09h30

EXTOLL: A new Interconnection Network Designed for HPC
Holger FRÖNING, HEIDELBERG UNIVERSITY

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10h00 

Technologies for future generation HPC systems
Jean-Pierre PANZIERA, BULL

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10h30 Coffee break - Exibition - Networking - Grand Hall
11h00

Storage I/O Challenges
Ghislain DE JACQUELOT, DATADIRECT NETWORKS

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11h30 

Bridging the peta- to exa-scale I/O gap
Peter BRAAM, XYRATEX

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12h00 

HSM for Lustre : Data hierarchization for parallel file systems
Guy CHESNOT, SGI FRANCE

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12h30 Lunch - Exibition - Networking - Grand Hall

 

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